First-in first-out storage device

ABSTRACT

A first-in first-out (FIFO) storage device for storing data including continuous identical values, which is reduced in a required circuit scale and increased in a reading operation speed, and which comprises a memory region ( 13 ) provided with a counter unit and a data unit corresponding to a plurality of addresses, a comparison unit ( 11 ) for checking whether or not a new input data is identical with an input data one data ahead of the new one, and a write control unit ( 12 ) for controlling, based on the checked result by the comparison unit ( 11 ), to write the current input data into a new address in the data unit of the memory region ( 13 ) when the new input data is not identical with the one-data-ahead input data and for controlling to count up a count value in a one-address-ahead address in the counter unit of the memory region ( 13 ) when the two data are identical with other.

TECHNICAL FIELD

The present invention relates to a first-in first-out storage device. Inparticular, the invention relates to a first-infirst-out storage device(FIFO) having compression and expansion functions.

BACKGROUND OF ART

In conventional first-in first-out storage devices (FIFOs), input dataare stored at addresses that are determined according to the order ofinput of the input data. Therefore, a conventional FIFO can store atmost data of an amount that is equal to its capacity.

Japanese Patent Application Laid-Open No. 2-202629 discloses a databuffer with a compression function that is improved in the above point.In this data buffer, the same, consecutive data are compressed intosingle data and loaded into a first FIFO and the identifier of a counterthat has counted the number of same, consecutive data is loaded into asecond FIFO, whereby the capacity of the first FIFO is reduced.

The configuration and operation of this data buffer will be describedwith reference to FIG. 12. When input data are the same, consecutivedata, a loading control circuit 3 stops sending the same data to a firstFIFO 1. At the same time, a counter circuit 5 and a counter selectioncircuit 6 recognize occurrence of the same, consecutive data based on acontrol signal that is supplied from the loading control circuit 3 andcount the number of occurrence of the same data based on the occurrencecoefficient of load signals. Also at the same time, a counter selectioncircuit 6 generates an identifier for selecting one of the counters inthe counter circuit 5 and loads the identifier of the selected counterinto a second FIFO 2 via an input data line. At the time of unloading,the identifier of a counter that counted the number of consecutiveoccurrence of the same data is output from the second FIFO 2 to a outputdata line and unloading from the first FIFO 1 is stopped by an unloadingcontrol circuit 4 until the count value being held by the counterconcerned becomes zero.

However, this data buffer requires the counter selection circuit 6 forgenerating an identifier for selecting one of the counters in thecounter circuit 5 and the second FIFO 2 for storing the identifier of aselected counter, and hence the circuit scale cannot be reducedsufficiently. There is another problem that the unloading operation iscomplex and hence it is difficult to increase the speed of the readingoperation.

DISCLOSURE OF INVENTION

To solve the above problems, a first-in first-out storage deviceaccording to the present invention comprises:

a memory area having a plurality of addresses and comprising a countersection and a data section corresponding to each of the addresses;

a comparison section which detects whether new input data andimmediately preceding data are identical or not; and

a writing control section which performs control based on a detectionresult of the comparison section, so that the new input data is writteninto the data section of the memory at a new address when the new inputdata and the immediately preceding input data are different from eachother, and so that a count value of the counter section of the memoryarea at an address where the immediately preceding input data has beenstored is incremented when the new input data and the immediatelypreceding input data are identical.

The writing control section may perform control so that the new inputdata is written into the data section of the memory area at a newaddress when the new input data and the immediately preceding input dataare identical and the count value of the counter section of the memoryarea at the address where the immediately preceding input data waswritten is equal to a maximum value.

Further, the first-in first-out storage device may further comprise areading control section which performs control so that data stored inthe data section of the memory area at a read address is read out oncewhen the count value of the counter section of the memory area at theread address is equal to a predetermined value, and so that data storedin the data section of the memory area at a read address is repeatedlyread out a number of times that is determined based on the count valuewhen the count value of the counter section of the memory area at theread address is other than the predetermined value other than thepredetermined value.

The first-in first-out storage device may further comprise a managementsection which outputs a signal for stopping a writing operation whendata is stored in the data section of the memory area at all theaddresses and the new input data and the immediately preceding data aredifferent from each other or the count value of the counter section at alast-written address is equal to a maximum value.

On the other hand, the first-in first-out storage device may furthercomprise a management section which outputs a signal for stopping areading operation when the number of data that has been read from thememory area becomes equal to the number of data that has been stored inthe memory area.

The first-in first-out storage device may further comprise a managementsection which outputs a signal for stopping a writing operation whendata that has not been read out yet are stored in the data section ofthe memory area at all the addresses.

The first-in first-out storage device may further comprise a managementsection which outputs a signal for stopping a reading operation when alast-read address of the memory area is the same as a last-writtenaddress of the memory area and the count value of the counter section isequal to the predetermined value.

According to the above-configured first-in first-out storage device ofthe present invention, it is not necessary to separately provide acounter selection circuit for generating an identifier of a counter thatis used conventionally and a second memory for storing the identifier.By providing the counter section and the data section in a single memoryso that they correspond to respective addresses, the scale of a circuitthat is necessary for storing the same and consecutive data can bereduced greatly. Further, the reading operation can be made faster thanin the case of using two memories and identifiers.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of a first-in first-out storage deviceaccording to a first embodiment.

FIG. 2 shows a first-in first-out memory area used in the first-infirst-out storage device of FIG. 1.

FIG. 3 is a timing chart showing an example of operation of a comparisonsection shown in FIG. 1.

FIG. 4 is a block diagram of a first-in first-out storage deviceaccording to a second embodiment.

FIG. 5 is a flowchart showing a data writing operation of the first-infirst-out storage device of FIG. 4.

FIG. 6 is a timing chart showing an example of writing operation of thefirst-in first-out storage device of FIG. 4.

FIG. 7 is a flowchart showing a data reading operation of the first-infirst-out storage device of FIG. 4.

FIG. 8 is a timing chart showing an example of reading operation of thefirst-in first-out storage device of FIG. 4.

FIG. 9 is a block diagram of a first-in first-out storage deviceaccording to a third embodiment.

FIG. 10 is a flowchart showing a data writing operation of the first-infirst-out storage device of FIG. 9.

FIG. 11 is a flowchart showing a data reading operation of the first-infirst-out storage device of FIG. 9.

FIG. 12 is a block diagram of a conventional data buffer.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the present invention will be hereinafter described withreference to the drawings.

1. First Embodiment

FIG. 1 is a block diagram of a first-in first-out storage deviceaccording to a first embodiment of the present invention. As shown inFIG. 1, the first-in first-out storage device has a comparison section11 for detecting whether consecutive input data are identical, a writingcontrol section 12 for controlling a writing operation based on adetection result of the comparison section 11, a first-in first-outmemory area 13 that is provided with counter sections and data sectionsthat correspond to a plurality of addresses, and a reading controlsection 14 for controlling a reading operation.

The operation of the first-in first-out storage device having the aboveconfiguration will be described below in detail with reference to FIG.2.

The comparison section 11 starts processing of input data in response toa write request signal. Specifically, the comparison section 11 comparesthe current input data that has newly been input externally with theimmediately preceding input data, detects whether they are identical,and outputs a detection result together with the input data.

This operation will be described by using an example that is shown inFIG. 3 in the form of a timing chart. When receiving a write requestsignal, the comparison section 11 captures, in synchronism with the nextclock, write data (e.g., C4) that is the current input data and holdsit, compares it with the immediately preceding input data (e.g., C6)that remains as comparison data, produces an output (e.g., “0”)indicating that the two data are different from each other to thewriting control section 12 as a detection result, and holds the writedata C4 by substituting it for the previous comparison data. When thesame write data occur consecutively, for example, when input data A3 isinput second time as shown in FIG. 3, the comparison section 11 comparesit with the immediately preceding input data A3 that remains ascomparison data and produces an output (e.g., “1”) indicating that thetwo data are identical to the writing control section 12 as a detectionresult.

Based on the detection result of the comparison section 11, the writingcontrol section 12 controls the memory area 13 by using a write controlsignal. Specifically, in the example of FIG. 2, if the current inputdata are different from their immediately preceding input data,respectively, the writing control section 12 sequentially writes thecurrent input data (00, C6, C4, and A3) to data sections of the memoryarea 13 at respective addresses and makes the count values of countersections “00”. On the other hand, if the current input data (second A3)is the same as the immediately preceding input data (first A3), thewriting control section 12 increments the count value of the countersection to “01” at the address (3) where the immediately preceding inputdata was stored but does not write the current input data (second A3).In this example, the count value is expressed by 2 bits and the data isexpressed by 8 bits (1 byte) . Therefore, in the above case, the data of2 bytes in total were stored in a memory of 1 byte and 2 bits (10 bitsin total).

Next, the operation of reading out stored data will be described. Inresponse to a read request signal, the reading control section 14controls the memory area 13 by using a read control signal.Specifically, in the example of FIG. 2, if the count values of countersections of the memory area 13 are “00”, the reading control section 14sequentially reads data (00, C6, and C4) from the data sections at therespective addresses. On the other hand, if the count value is not equalto “00”, the reading control section 14 repeatedly reads the same dataadditionally a number of times that is equal to the count value. Forexample, if the count value is “01”, the reading control section 14reads out the same data (A3) twice in total. If the count value is “10”,the reading control section 14 reads out the same data (CC) three timesin total.

According to this embodiment, since the counter sections and the datasections are provided so as to correspond to the respective addresses ofthe single first-in first-out memory area, it is not necessary toseparately provide a counter selection circuit for generating anidentifier of a counter and a second memory area for storing anidentifier that are disclosed in Japanese Patent Application Laid-OpenNo. 2-202629 and hence the scale of a circuit that is necessary to storethe same, consecutive data can be reduced greatly. Further, theinvention can make the reading operation faster than in the case ofusing two memory areas and identifiers.

2. Second Embodiment

Next, a second embodiment of the present invention will be described.Only different points from the first embodiment will be described below.The second embodiment is the same as the first embodiment except for thepoints described below. The components of the second embodiment havingcorresponding components in the first embodiment will be given the samereference numerals as the latter.

FIG. 4 is a block diagram of a first-in first-out storage deviceaccording to the second embodiment of the present invention. In thisembodiment, a management section 25 for managing free space is added tothe first-in first-out storage device according to the first embodimentshown in FIG. 1.

The management section 25 shown in FIG. 4 recognizes that the memoryarea 13 is full and outputs a FIFO full signal if the data sections ofthe memory area 13 are in a maximum storage state (i.e., data are storedin the data sections at all addresses) and if the current input data isdifferent from the immediately preceding input data or the count valueof the counter section having the last address is equal to the maximumvalue though the current input data is the same as the immediatelypreceding input data. In response, the comparison section 11 stopscomparing input data and the writing control section 12 stops the datawriting operation. Further, the management section 25 manages the numberof data that have been stored in the memory area 13. If the number ofdata that have been read from the memory area 13 becomes equal to thenumber of data that have been stored in the memory area 13, themanagement section 13 recognizes that the memory area 13 is empty andoutputs a FIFO empty signal. In response, the reading control section 14stops the data reading operation.

The writing operation of the first-in first-out storage device havingthe above configuration will be described below in detail with referenceto a flowchart of FIG. 5.

In response to a write request signal, the comparison section 11 startsprocessing of input data (step S11) . First, it is judged whether a FIFOfull signal exists (step S12) . If a FIFO full signal exists, the datacomparison operation is stopped (step S13). On the other hand, if a FIFOfull signal does not exist, the current input data is compared with theimmediately preceding input data (step S14). If they are different fromeach other, the writing control section 12 writes the current input datato a data section of the FIFO 13 at a new address (step S15). On theother hand, if they are identical, the writing control section 12designates an address where the immediately preceding input data wasstored and it is judged whether the count value of the counter sectionis equal to the maximum value (step S16) . If the count value is equalto the maximum value, the current input data is written to a datasection at a new address (step S15) . On the other hand, the count valueis not equal to the maximum value, the count value of the countersection at the address where the immediately preceding input data wasstored is incremented (step S17) After the execution of step S15 or S17,the management section 25 increases the number of stored data (stepS18).

FIG. 6 is a timing chart showing an example of writing operation inwhich a FIFO full signal is not output from the management section 25and data A is written consecutively. In this example, the fact that thewrite data A as the current input data is the same as the immediatelypreceding input data A is detected by the comparison section 11 everytime a write request arrives. The writing control section 12 incrementsthe count value of the counter section of the memory area 13 at thecurrent address every time a write request arrives until the above countvalue becomes equal to the maximum value that is “11”. If the countvalue of the counter section has become the maximum value of “11”, whenthe next write request occurs the current input data A is written to thedata section of the memory area 13 at the next address. If the inputdata A still continues to occur, the writing control section 12increments, in the same manner as described above, the count value ofthe counter section of the memory area 13 at the address concerned everytime a write request arrives until the above count value becomes equalto the maximum value. The count of the management section 25 isincreased every time a write request arrives unless a FIFO full signalis output.

Next, the operation of reading out stored data will be described belowwith reference to a flowchart of FIG. 7.

In response to a read request signal, the reading control section 14starts an operation of reading out stored data (step S21). First, it isjudged whether a FIFO empty signal exists that is to be output from themanagement section 25 (step S22) If a FIFO empty signal exists, the datareading operation is stopped (step S23). On the other hand, if a FIFOempty signal does not exist, it is judged whether the count value thatis set in the counter section of the memory area 13 at a designatedaddress is equal to “0” (step S24). If the count value is equal to “0”,the read address value is incremented and a transition is made to thenext data section (step S25). If the count value is not equal to “0”,the count value is decremented (step S26) After the execution of stepS25 or S26, data is output from the memory area 13 (step S27) and isfurther output from the reading control section 14 (step S28).

FIG. 8 is a timing chart showing an example of reading operation. Inthis example, since a FIFO empty signal is not output from themanagement section 25, the reading control section 14 starts a readingoperation in response to a read request signal. Since the count value ofthe counter section at the current read address of the memory area 13 is“10” and not “00”, the count value of the counter section is decrementedto “01” and the count value of the management section is decremented to“110”. Data B is output from the memory area and is further output fromthe reading control section 14. As the reading continues in the abovemanner, in this example, when data B is read out third time, the countvalue of the counter section at the current address is equal to “00” andhence the read address value is incremented. In this example, the countvalue of the counter section at the resulting address is equal to “11”.Upon occurrence of the next read request signal, data C is read from thedata section at the incremented address and the count value of thecounter section at the same address is decremented to “10”. The countvalue of the management section 25 is decremented every time data of 1byte is read out.

In addition to the advantages of the first embodiment, this embodimentprovides an advantage that whether the memory area has free space can berecognized correctly at the time of data writing. Further, since themanagement section performs management based on presence/absence ofeffective data in the data sections of the memory area and count valuesof the counter sections, the management section can recognize the numberof effective data in the memory area in consideration of the countvalues. This is effective in transferring a plurality of datasimultaneously at the time of data reading.

3. Third Embodiment

Next, a third embodiment of the present invention will be described.Only different points than in the first embodiment will be describedbelow. The third embodiment is the same as the first embodiment exceptfor the points described below. The components of the third embodimenthaving corresponding components in the first embodiment will be giventhe same reference numerals as the latter.

FIG. 9 is a block diagram of a first-in first-out storage deviceaccording to the third embodiment of the present invention. In thisembodiment, a management section 35 is added to the first-in first-outstorage device according to the first embodiment shown in FIG. 1.

The management section 35 is different from the management section 25 ofthe second embodiment in the following points. That is, the managementsection 35 includes a write flag holding section 37 for holding a writeflag that indicates whether the writing belongs to an odd-numbered oreven-numbered circulation in the memory area, a write pointer holdingsection 38 for holding a write pointer value that indicates a writeaddress, a write address count holding section 39 for holding the countvalue of the counter section at a write address, a read flag holdingsection 47 for holding a read flag that indicates whether the readingbelongs to an odd-numbered or even-numbered circulation in the memoryarea, a read pointer holding section 48 for holding a read pointer valuethat indicates a read address, and a read address count holding section49 for holding the count value of the counter section at a read address.A write request signal, a comparison result signal that is output fromthe comparison section 11, a read address count signal that is outputfrom the reading control section 14, and a read request signal are inputto the management section 35. The management section outputs a writemanagement signal that is supplied to the writing control section 12, aread control signal that is supplied to the reading control section 14,a FIFO full signal, and a FIFO empty signal.

The write flag holding section 37 holds a 1-bit write flag that isinverted to “00” or “1” every time the write address of the memory area13 returns to the head address. The write flag holding section 37 holds“0” in a state that the first-in first-out storage device 30 is reset.

The write pointer holding section 38 holds data of 8 bits, for example,that indicates an address of the memory area 13 at which data waswritten last. The write pointer holding section 38 holds a value (e.g.,“0”) corresponding to the head address in a state that the first-infirst-out storage device 30 is reset.

The write address count holding section 39 holds a count value of 2bits, for example, of the counter section at an address indicated by thewrite pointer. The write address count holding section 39 holds “0” in astate that the first-in first-out storage device 30 is reset.

The read flag holding section 47 holds a 1-bit read flag that isinverted to “0” or “1” every time the read address of the memory area 13returns to the head address. The read flag holding section 47 holds “0”in a state that the first-in first-out storage device 30 is reset.

The read pointer holding section 48 holds data of 8 bits, for example,that indicates an address of the memory area 13 at which data was readout last. The read pointer holding section 48 holds a value (e.g., “0”)corresponding to the head address in a state that the first-in first-outstorage device 30 is reset.

The read address count holding section 39 holds a count value (e.g.,2-bit data) of the counter section at an address indicated by the readpointer. The write address count holding section 39 holds “0” in a statethat the first-in first-out storage device 30 is reset.

The writing operation of the first-in first-out storage device 30 havingthe above configuration will be described below with reference to aflowchart of FIG. 10.

The management section 35 and the comparison section 11 start processingof input data in response to a write request signal (step S31).

First, the management section 35 judges whether the read flag and thewrite flag are identical (step S32). That is, at this step, it is judgedwhether the number of times the head memory address has been reached inreading is equal to the number of times the head memory address has beenreached in writing. If the read flag and the write flag are differentfrom each other, which means that the reading and the writing belong todifferent circulations, it is judged whether the read pointer indicatesa larger address than the write pointer to prevent writing at an addresswhere reading has not been performed yet (step S33). If the read pointerindicates the same address as the write pointer, which means that thereexists no address where reading has finished but writing has notfinished yet, a FIFO full signal is issued and writing is prohibited(step S34).

If it is found at step S33 that the read pointer indicates a largeraddress than the write pointer or if it is found at step S32 that theread flag and the write flag are identical, which means that thereexists an address where writing can be performed (empty address),preparation for writing is started. First, it is judged based on thedetection result output of the comparison section 11 whether data to bewritten is the same as data that was written immediately before (stepS35). If the data to be written is the same as the data that was writtenimmediately before, it is further judged whether the count value of thecounter section at the write address indicated by the write pointer isequal to the maximum value (step S36). If the count value is not equalto the maximum value, the input data is written by incrementing thecount value (step S37).

If it is found at step S36 that the count value at the write address isequal to the maximum value or if it is found at step S35 that the inputdata is not the same as the immediately preceding data, it is recognizedthat the data cannot be written by incrementing the counter. Therefore,the address indicated by the write pointer is incremented (step S38). Ifthe write pointer indicated the tail address value immediately beforethe incrementing, the incrementing causes the write pointer to indicatethe head address. If the address indicated by the write pointer returnsto the head address in this manner, the write flag is inverted (stepsS39 and S40). After the execution of step 40, the input data is writtento the data section at the address indicated by the write pointer andthe count value of the counter section is set at “0” (step S41).

Next, the reading operation of the first-in first-out storage device 30will be described with reference to a flowchart of FIG. 11.

The management section 35 starts processing of input data in response toa read request signal (step S51).

First, the management section 35 judges whether the read flag and thewrite flag are identical (step S52). That is, the management section 35judges whether the number of times the head memory address has beenreached in reading is equal to the number of times the head memoryaddress has been reached in writing. If the read flag and the write flagare identical, which means that the reading and the writing belong tothe same circulation, it is judged whether the read pointer indicates asmaller address than the write pointer to prevent reading at an addresswhere writing has not been performed yet or reading has already beenperformed (step S53). If the read pointer indicates the same address asthe write pointer, which means that the read address has reached thewrite address, it is judged whether data remains as a count of thecounter section by judging whether the count of the counter section atthe read address is equal to “0” or not (step S54). If the count isequal to “0”, which means that there does not remain data that has notbeen read out yet, a FIFO empty signal is issued and reading isprohibited (step S56). If it is found at step S54 that the count valueof the counter section at the read address is not equal to “0”, thecount value is decremented (step S55).

If it is found at step S52 that the read flag is not the same as thewrite flag, which means that the writing belongs to a circulation aheadof a circulation of the reading and there necessarily remain data thathave not been read out yet, preparation for reading is started. It isjudged whether the count value of the counter section at the readaddress is equal to “0” or not. If the count value is not equal to “0”,the count value is decremented (step S55).

If the count value of the counter section at the read address is equalto “0”, no data remains at that address and hence the read pointer isincremented (step S58). If the read pointer indicated the tail addressvalue immediately before the decrementing, the decrementing causes theread pointer to indicate the head address. If the address indicated bythe read pointer returns to the head address in this manner, the readflag is inverted (steps S59 and S60). After the execution of step 60 or55, data of the data section at the address indicated by the readpointer is read out (step S61).

In addition to the advantages of the first embodiment, this embodimentprovides an advantage that whether the memory area has free space can berecognized correctly at the time of data writing. Further, thisembodiment makes it possible to manage the memory area of a first-infirst-out storage device having compression and expansion functionsbased on the relationship between the write address and the read addressand count values of the counter sections.

What is claimed is:
 1. A first-in first-out storage device comprising: amemory area having a plurality of addresses and comprising a countersection and a data section corresponding to each of the addresses; acomparison section which detects whether new input data and immediatelypreceding data are identical or not; a writing control section whichperforms control based on a detection result of the comparison section,so that the new input data is written into the data section of thememory at a new address when the new input data and the immediatelypreceding input data are different from each other, and so that a countvalue of the counter section of the memory area at an address where theimmediately preceding input data has been stored is incremented when thenew input data and the immediately preceding input data are identical;and a management section comprising a write flag holding section forholding a write flag that indicates whether the writing belongs to anodd-numbered or even-numbered circulation in the memory area, a readflag holding section for holding a read flag that indicates whether thereading belongs to an odd-numbered or even-numbered circulation in thememory area, a write pointer holding section for holding a write pointervalue that indicates a last-written address, and a read pointer holdingsection for holding a read pointer value that indicates a last-readaddress, wherein the management section outputs a signal for stopping areading operation when the write and read flags are identical, the writeand read pointer values are identical, and the count value of thecounter section at the last-read address is equal to zero.
 2. Thefirst-in first-out storage device according to claim 1, wherein thewriting control section performs control so that the new input data iswritten into the data section of the memory area at a new address whenthe new input data and the immediately preceding input data areidentical and the count value of the counter section of the memory areaat the address where the immediately preceding input data was written isequal to a maximum value.
 3. The first-in first-out storage deviceaccording to claim 1, further comprising a reading control section whichperforms control so that data stored in the data section of the memoryarea at a read address is read out once when the count value of thecounter section of the memory area at the read address is equal to apredetermined value, and so that data stored in the data section of thememory area at a read address is repeatedly read out a number of timesthat is determined based on the count value when the count value of thecounter section of the memory area at the read address is other than thepredetermined value.
 4. The first-in first-out storage device accordingto claim 1, wherein the management section outputs a signal for stoppinga writing operation when data is stored in the data section of thememory area at all the addresses and the new input data and theimmediately preceding data are different from each other or the countvalue of the counter section at a last-written address is equal to amaximum value.
 5. The first-in first-out storage device according toclaim 1, wherein the management section outputs a signal for stopping awriting operation when data that has not been read out yet are stored inthe data section of the memory area at all the addresses.
 6. Thefirst-in first-out storage device according to claim 1, wherein themanagement section outputs a signal for stopping a reading operationwhen the last-read address of the memory area is the same as thelast-written address of the memory area and the count value of thecounter section is equal to a predetermined value.
 7. The first-infirst-out storage device according to claim 2, wherein the managementsection outputs a signal for stopping a writing operation when data isstored in the data section of the memory area at all the addresses andthe new input data and the immediately preceding data are different fromeach other or the count value of the counter section at a last-writtenaddress is equal to a maximum value.
 8. The first-in first-out storagedevice according to claim 3, wherein the management section outputs asignal for stopping a writing operation when data is stored in the datasection of the memory area at all the addresses and the new input dataand the immediately preceding data are different from each other or thecount value of the counter section at a last-written address is equal toa maximum value.
 9. The first-in first-out storage device according toclaim 2, wherein the management section outputs a signal for stopping awriting operation when data that has not been read out yet are stored inthe data section of the memory area at all the addresses.
 10. Thefirst-in first-out storage device according to claim 3, wherein themanagement section outputs a signal for stopping a writing operationwhen data that has not been read out yet are stored in the data sectionof the memory area at all the addresses.
 11. The first-in first-outstorage device according to claim 2, wherein the management sectionoutputs a signal for stopping a reading operation when the last-readaddress of the memory area is the same as the last-written address ofthe memory area and the count value of the counter section is equal to apredetermined value.
 12. The first-in first-out storage device accordingto claim 3, wherein the management section outputs a signal for stoppinga reading operation when the last-read address of the memory area is thesame as the last-written address of the memory area and the count valueof the counter section is equal to the predetermined value.
 13. Thefirst-in first-out storage device according to claim 1, wherein themanagement section outputs a signal for stopping a writing operationwhen the number of data that has been read in the memory area isdifferent than the number of data that has been stored in the memoryarea and the last-read address of the memory area is the same as thelast-written address of the memory area.
 14. The first-in first-outstorage device according to claim 1, wherein the management sectionoutputs a signal for stopping a writing operation when the write andread flags are not identical and the write and read pointer values areidentical.